In a solar cell having a silicon substrate, silver is commonly used for collector electrode wiring. Considering that the cost of silver as a raw material, which accounts for 20% or more of the total material cost of a solar cell, has been soaring in recent years, substitution of lower cost copper for silver has been demanded in order to reduce the price of a solar cell.
However, copper (Cu) and silicon (Si) undergo interdiffusion to form copper silicide. Further, copper rapidly diffuses into a region of silicon to form an acceptor level at an energy position deep in the band gap of silicon. Since these phenomena may be responsible for deteriorated properties of a solar cell, a diffusion barrier layer is required between copper and silicon in order to minimize interdiffusion of copper and silicon.
Moreover, due to the difference in the work functions of copper and silicon, the electrical contact characteristics at an interface between a copper region and silicon region is of Schottky contacts, and an interface with high contact resistance is formed. This will be accompanied by significant power loss when electric power generated inside a silicon cell is retrieved outside. In order to reduce this type of electric power loss as much as possible, an approach required is for increasing the concentration of an impurity in a contact region of silicon to reduce resistance. Further, the aforementioned diffusion barrier layer needs to have low electrical resistance so that the electrical contact characteristics at the interface are of ohmic contacts.
Furthermore, when cells are connected to each other to form a module, cells are connected (stringed) through a soldered (tabbed) wiring material (tab ribbon). Therefore, good adhesiveness is required between copper wiring and a silicon substrate.
There have been many previous reports about forming interface layers which satisfy the aforementioned requirements.
As a first type of interface layers, metal alloys and compounds have been proposed.
For example, Nonpatent Document 1 describes an electrode formed by depositing nickel on a silicon substrate by the electroless plating method, and forming nickel silicide in a subsequent heat treatment, and then further forming copper by the electrolytic plating method.
Nonpatent Document 2 also proposes to form nickel by the electroless plating method as well.
Nonpatent Document 3 describes an electrode formed by depositing gold on a silicon substrate by the displacement plating method, and then forming copper by the electrolytic plating method.
Nonpatent Document 4 describes an electrode formed by depositing a lamination layer of a titanium thin film and a copper thin film on a silicon substrate by the thermal deposition method, and then forming a copper thick film by the electrolytic plating method.
Patent Document 1 (Japanese Patent Application Laid-Open No. 2011-238903) proposes that ohmic contacts are obtained by depositing nickel or cobalt on a silicon substrate and performing rapid heating to form silicide, and any of NiP, CoP or CoWP is further formed to obtain a diffusion barrier layer, and Cu is then deposited.
Patent Document 2 (Japanese Patent Application Laid-Open No. 2012-60123) describes a diffusion barrier layer obtained by depositing aluminum (Al) as a first metal film on a silicon substrate using the vapor deposition method, and further depositing titanium tungsten (TiW) as a second metal film.
Patent Document 3 (Japanese Patent Application Laid-Open No. 2004-266023) proposes that any of Ti, Ni, Cr or Pt is deposited on a silicon substrate using the vapor deposition method to obtain a diffusion barrier layer.
Patent Document 4 (Japanese Translation of PCT International Application Publication No. 2006-523025) proposes that any of Ti, W or Cr is deposited to obtain a diffusion barrier layer.
In any of the above cases, the electrical resistance at an interface layer shows a low value, and the ohmic contact characteristics can be obtained. However, copper will diffuse into silicon through the entire interface layer or through the grain boundary in the interface layer as diffusion routes, and thus good diffusion barrier characteristics can not be obtained for the interface layer. Therefore, disadvantageously, the long-term reliability, which is a requirement for a solar cell, is inferior.
As a second type of interface layers, transparent conducting films (TCO: Transparent Conductive Oxide) have been proposed.
In Patent Document 5 (Japanese Patent Application Laid-Open No. 2000-58888), a transparent conducting film is formed on the surface of a low resistance noncrystalline silicon semiconductor layer in which a high concentration of an impurity is doped, and a metal collector electrode is then formed thereon to facilitate current conduction between the collector electrode and the noncrystalline silicon. TCOs in this case are indium tin oxide (ITO), zinc oxide (ZnO) and tin oxide (SnO2), which are intended to adjust an oxygen content for reducing electrical resistance.
Patent Document 6 (Japanese Patent Application Laid-Open No. 2011-199045) describes a method in which a TCO is formed on the surface of a noncrystalline silicon semiconductor layer, and a translucent insulating layer is formed thereon, and a collector electrode is further formed thereon by the plating method to make contact with the noncrystalline silicon semiconductor through a groove-like opening provided at the translucent insulating layer. TCOs are not specified, but translucent insulating layers are specified as SiO2, SiN, TiO2 and Al2O3.
In Patent Document 7 (US 2012/0305060), a quantum tunneling barrier layer is formed on the surface of an n-type silicon substrate, and a surface electric field layer is formed thereon comprising noncrystalline silicon in which a high concentration of an impurity is doped, and a TCO is formed thereon to further form a copper or nickel electrode thereon. Quantum tunneling barrier layers are specified as SiOx, SiNx, AlOx and SiON, and TCOs are specified as ITO, SnOx, Al-doped ZnO (AZO) and Ga-doped ZnO (GZO).
In any of the above cases, the electrical resistance at a TCO interface layer shows a low value, and the ohmic contact characteristics can be obtained. However, when a collector electrode is sintered at a high temperature, a TCO is reduced by silicon to change its properties, and insulating SiO2 is formed at an interface because an oxide to become a TCO is less stable than SiO2. Therefore, disadvantageously, the ohmic contact characteristics are deteriorated.
Further, disadvantageously, the adhesiveness between copper wiring and a transparent conducting film will be insufficient. Patent Document 6 proposes that an additional interface layer comprising Ti, TiN, TiW, Ta, TaN, WN, Co is formed in order to obtain adhesiveness with a diffusion barrier layer.
In recent years, titanium oxides have been attracting attention as new TCO materials. TiO2 is advantageous in that it will not be reduced upon contact with silicon at a high temperature because it is a more stable oxide than SiO2.
Nonpatent Document 5 proposes that a TCO layer comprising Nb-doped TiO2 is formed at an interface between an n++ polycrystalline silicon layer and a quantum dot layer. The document describes that heat treatment at 900° C. is required to form a quantum dot layer, and the presence of a TCO layer when performing the above heat treatment can prevent phosphorus (P), an impurity element in an n++ polycrystalline silicon layer, from diffusing into the quantum dot layer.
Nonpatent Document 6 describes that P-doped TiO2 shows diffusion barrier characteristics against P.
Patent Document 8 (U.S. Pat. No. 7,888,594) describes that Nb-doped TiOx or Nb- or Al-doped TiZnOx can improve the conversion efficiency of a solar cell due to their larger refractive index and light transmittance as compared with those of TiOx.
TiO2 is also used as an electrode of a dye-sensitized solar cell.
Nonpatent Document 7 describes that Nb, Ge, Zr-doped TiO2 used in an electrode can improve the efficiency of a dye-sensitized solar cell.
However, these prior art documents do not include any statement with regard to whether or not a Ti oxide can serve as a diffusion barrier layer between copper and silicon in a silicon solar cell having copper wiring, neither does any statement of implementation of it.
A third type of interface layers is a diffusion barrier layer for a semiconductor integrated circuit (LSI) having a similar lamination structure although it is not intended for use in a solar cell. An oxide comprising manganese and silicon has been reported to be effective as a diffusion barrier layer between Cu and SiO2.
For example, Nonpatent Document 8 describes that MnSixOy formed at an interface by depositing a Cu—Mn alloy on a SiO2 insulator layer and performing heat treatment has excellent diffusion barrier characteristics against interdiffusion between Cu and SiO2.
Patent Document 9 (Japanese Patent Application Laid-Open No. 2005-277390) proposes a diffusion barrier layer mainly comprising a material selected from the group consisting of MnxOy, MnxSiyOz, MnxCyOz and MnxFyOz, the diffusion barrier layer having an effect of preventing interdiffusion between a Cu-based wiring layer and an interlaminar insulating layer comprising any of Si, C, F, O.
Patent Document 10 (Japanese Patent Application Laid-Open No. 2009-231739) describes that when Mn in a Cu alloy reacts with a SiOC insulating layer, an oxide comprising Mn, C and H is formed, showing an effect of preventing interdiffusion between Cu and SiOC.
However, these reports and inventions relate to interface layers having diffusion barrier characteristics between an insulating layer of SiO2, SiOC and the like and Cu, and the interface layers need to be electrically insulating in nature. Therefore, a problem is that the electrical conductivity between copper and a Si substrate, i.e., good ohmic contact characteristics can not be obtained when these interface layers are applied to solar cells.
In contrast to these reports, an attempt has been reported to reconcile the diffusion barrier characteristics and the electric conductivity between a silicon substrate and Cu without inclusion of an insulating layer in a contact plug structure.
Patent Document 11 (Japanese Patent Application Laid-Open No. 2011-61187) describes that Ni or Co silicide is formed on a highly-doped n-type Si substrate to obtain the ohmic contact characteristics with the Si substrate, and an Mn oxide is further formed on the silicide to confer a function as a diffusion barrier layer. However, a problem is that the silicide non-uniformly enters into an emitter layer near the surface of the Si substrate due to the non-uniform thickness of the silicide, resulting in deteriorated performance of a solar cell.
Patent Document 12 (Japanese Patent Application Laid-Open No. 2011-171334) describes that the oxygen plasma treatment was performed on a silicide surface to form an oxide, allowing for improved interface adhesiveness, and excellent diffusion barrier characteristics were able to be obtained by forming lamination oxides of MnαSiβOγ and MnOx. However, the thickness of the oxide formed on the silicide surface needs to be limited to 1.5 nm or less since the oxide is highly resistive. As a consequence, the oxide can not be formed on the entire area of a solar battery cell in a uniform thickness, resulting in insufficient diffusion barrier characteristics.    Patent Document 1: Japanese Unexamined Patent Application, Publication No. 2011-238903    Patent Document 2: Japanese Unexamined Patent Application, Publication No. 2012-60123    Patent Document 3: Japanese Unexamined Patent Application, Publication No. 2004-266023    Patent Document 4: Japanese Unexamined Patent Application (Translation of PCT Application), Publication No. 2006-523025    Patent Document 5: Japanese Unexamined Patent Application, Publication No. 2000-58888    Patent Document 6: Japanese Unexamined Patent Application, Publication No. 2011-199045    Patent Document 7: U.S. Published Patent Application Publication, No. 2012/0305060, Specification    Patent Document 8: U.S. Pat. No. 7,888,594, Specification    Patent Document 9: Japanese Unexamined Patent Application, Publication No. 2005-277390    Patent Document 10: Japanese Unexamined Patent Application, Publication No. 2009-231739    Patent Document 11: Japanese Unexamined Patent Application, Publication No. 2011-61187    Patent Document 12: Japanese Unexamined Patent Application, Publication No. 2011-171334    Non-Patent Document 1: E. J. Lee et al., Solar Energy Materials and Solar Cells, vol. 74, pp. 65-70(2002)    Non-Patent Document 2: J.-H. Guo and J. E. Cotter, Solar Energy Materials and Solar Cells, vol. 86, pp. 485-498(2005)    Non-Patent Document 3: S. K. Matlow and E. L. Ralph, Solid-State Electronics, vol. 2, pp. 202-208(1961)    Non-Patent Document 4: J. Kang et al., Solar Energy Materials and Solar Cells, vol. 74, pp. 91-96(2002)    Non-Patent Document 5: S. Yamada et al., Proceedings of 37th IEEE Photovoltaic Specialists Conference (PVSC 2011)    Non-Patent Document 6: B. S. Richards et al., Proceedings of 28th IEEE Photovoltaic Specialists Conference (PVSC 2000)    Non-Patent Document 7: Imahori et al., Langumuir, vol. 22, pp. 11405-11411(2006)    Non-Patent Document 8: J. Koike and M. Wada, Applied Physics Letters, vol. 87, 041911(2005)